Implementing a Clock Synchronization Protocol on a Multi-Master Switched Ethernet Network

Authors Mohammad Ashjaei | Moris Behnam | Guillermo Rodríguez-Navas González | Thomas Nolte
In 18th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA13), Cagliari, Italy, 2013.

The interest to use Switched Ethernet technologies in real-time communication is increasing due to its absence of collisions when transmitting messages. Nevertheless, using COTS switches affect the timeliness guarantee inherent in potentially overflowing internal FIFO queues. In this paper we focus on a solution, called the FTT-SE protocol, which is developed based on a master-slave technique. Recently, an extension of the FTT-SE protocol has been proposed where the transmission of messages are controlled using multiple master nodes. In order to guarantee the correctness of the protocol, the masters should be timely synchronized. Therefore, in this paper we investigate using a clock synchronization protocol, based on the IEEE 1588 standard, among master nodes and we study the effects of this protocol on the network performance. In addition, we present a formal verification of this solution by means of model checking to prove the correctness of the FTT-SE protocol when the clock synchronization protocol is applied.


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